Development of optimized silicon IP cores per functional and interface requirements.
Redesign of an IP core to adapt to new requirements.
Optimization of an IP core to meet specific power, performance, and area (PPA) requirements.
Design and development of ASICs.
Synthesis of a digital design with a given technology node.
Placement & routing of a digital design with a given node.
Optimization of a design based on the results of synthesis and placement & routing.
Design and simulation of modern communication systems, including Wi-Fi(802.11n/ac/ax/be) and 5G NR
Algorithm development and modeling using C, MATLAB, etc
Advanced error correction, equalization, synchronization, and signal detection techniques
Test benches development for function verification of ASICs.
Verification of a digital or mixed-signal design using assertions.
Verification of synthesized or placed & routed netlist with timing information.
Development of FPGA-based embedded systems.
Development of FPGA prototypes before an ASIC development.
Deployment of RTL code to FPGA boards and integration of IP cores.
ASIC/FPGA implementation of algorithms and architectures for artificial intelligence (AI) and digital communication and signal processing
Embedded implementation of wireless and AI systems