XCEL ASICs is a young Swiss startup that develops optimized semiconductor IP cores and provides diverse services for efficient ASIC (application-specific integrated circuit) or FPGA implementation of machine learning (ML), digital communication, and digital signal processing (DSP) systems. At XCEL ASICs, we use a cross-layer approach by algorithm, architecture, and circuit co-design for optimized ASIC or FPGA implementation. Our recent optimized IP cores to accelerate your communication ASIC's development or FPGA prototyping are:
One of the world's highest-throughput WiFi-compliant low-density parity-check (LDPC) decoder,
Saleh Usman, XCEL ASICs' founder, has over seventeen years of industrial and academic experience and broad knowledge in digital design, efficient FPGA and ASIC implementation, wireless communication systems, error-correction codes, machine learning, and embedded systems. He has worked in academia and industries in South Asia, the Middle East, and Europe. The title of his PhD dissertation was Optimized ASIC Accelerator Chips for LDPC Decoders by Joint Algorithm, Architecture, and Circuit Co-Design. His research has been published in esteemed journals and conferences like ITCAS II, ISCAS, ISVLSI, and Globecom.